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2025-04-02-rising

  • 精選方式: RISING

討論重點​

以下是25篇討論重點的條列式總結，並附上對應文章錨點連結：

1. 台積電工作文化批判​

  • 高壓環境：長時間工作、急迫需求，缺乏休息。
  • 工程師權益：壟斷市場恐壓低薪資，限制職場選擇。
  • 血汗文化：比擬中國血汗工廠，股東獲利優先於員工福祉。

2. 三星半導體實習資訊尋求​

  • 負評關注：對公司負面評價的擔憂，但缺乏細節。
  • 主動調查：透過Reddit等平台補充資訊缺口。
  • 動機：為實習預作準備，了解行業真實情況。

3. GlobalFoundries收購動態​

  • 交易進展：收購傳聞、談判狀態與監管審批。
  • 產業影響：對晶圓代工市場競爭與供應鏈的潛在衝擊。

4. 英特爾實習生錄取風險​

  • 撤銷可能性：因晶圓廠延遲，實習生可能被視為成本負擔。
  • 公司困境：財務表現不佳影響人力資源政策。

5. 應用材料實習面試經驗​

  • 求職焦慮：等待軟體工程實習結果，尋求同儕支持。
  • 互動需求：分享面試經歷並詢問他人進度。

6. 俄羅斯光刻機技術發展​

  • 技術自主化：俄羅斯嘗試開發本土光刻系統。
  • 地緣政治：制裁下的技術突破挑戰。

7. 半導體工程師轉職困境​

  • 職業倦怠：設備維護工作高壓且單調（"fab monkey"）。
  • 轉職障礙：薪資落差與技能轉換的不確定性。

8. GaAs晶圓的潛在風險​

  • 價值模糊：不明確的技術用途與收藏價值。
  • 安全疑慮：砷化鎵毒性與不當處理的健康危害。

9. VLSI學生實習機會​

  • 背景需求：BTech學生尋求半導體產業實習。
  • 市場趨勢：探討印度、台灣等地實習職缺現況。

10. GlobalFoundries與聯電合併傳聞​

  • 產業整合：兩公司談判合併以強化成熟製程競爭力。
  • 時間框架：預計2025年完成，反映供應鏈重組趨勢。

11. SiCarrier總裁演講分析​

  • 業務定位：中國半導體設備商技術方向與市場策略。
  • 行業信號：SEMICON China展會中的自主化進展。

12. 美中科技戰升級​

  • 政策對抗：技術出口管制與供應鏈脫鉤加劇。
  • 特朗普因素：潛在更激進的對華科技限制。

13. 台積電2奈米製程壟斷​

  • 競爭空缺：三星、英特爾退出先進製程研發。
  • 產業風險：單一供應商對定價與創新的影響。

14. 應用材料專案經理面試​

  • 經驗徵求：面試結構、考核重點與公司文化契合度。
  • 職能需求：技術與管理能力的平衡。

15. [博士後求職困境](#15-strugg​

文章核心重點​

以下是根據每篇文章生成的一句話摘要（以條列方式呈現）：

  1. TSMC工作文化批判：作者痛批台積電高壓血汗工廠文化，指控其壓榨工程師權益並助長惡性競爭。
  2. 三星半導體實習擔憂：實習生因聽聞負評而焦慮，主動尋求更多公司內部文化資訊。
  3. 聯電新加坡擴廠：聯電投資50億美元在新加坡建晶圓廠，預計創造700個工作機會。
  4. 英特爾實習生錄取危機：擔憂英特爾CEO可能因晶圓廠延遲而撤銷實習offer，引發職涯不確定性。
  5. 應用材料面試經驗：求職者分享軟體工程實習面試經歷，焦急等待結果並尋求同儕回饋。
  6. 俄羅斯光刻機自主化：俄國宣稱成功自研半導體曝光設備，挑戰技術封鎖現狀。
  7. 半導體工程師轉職困境：設備工程師因職業倦怠欲轉行，卻面臨薪資與技能轉換的兩難。
  8. GaAs晶圓潛在風險：專家警告未經處理的砷化鎵晶圓可能釋放有毒物質，籲謹慎處置。
  9. VLSI學生求實習機會：印度工程學生詢問當前半導體產業實習缺額，盼累積實務經驗。
  10. GlobalFoundries與聯電併購傳聞：消息指出兩大晶圓廠可能合併，以強化成熟製程市場地位。
  11. SiCarrier中國演講：SiCarrier總裁於SEMICON China闡述公司技術戰略，展現進軍設備市場野心。
  12. 美中科技戰升級：分析特朗普若當選可能加劇對中科技制裁，衝擊全球供應鏈布局。
  13. 台積電2奈米製程獨霸：憂心競爭對手退出先進製程，台積電恐成唯一2奈米供應商。
  14. 應用材料PM面試技巧：求職者徵求專案經理職位面試準備建議，聚焦半導體設備產業需求。
  15. 博士後求職困境：半導體博士苦尋業界工作未果，求助履歷優化與職涯策略。
  16. VLSI工程單調性討論：IT從業者質疑VLSI工作重複性高，猶豫是否轉入該領域。
  17. 台星大學電機比較：分析兩國學程差異，新加坡重國際實務、台灣強在性價比與在地產業。
  18. 類比IC課程選擇：碩士生糾結選課方向，盼強化混合信號設計職涯競爭力。
  19. 美國晶片法案爭議：支持者警告廢除法案將打擊本土半導體投資，危及技術自主。
  20. 金屬-半導體接面疑惑：學者探討能帶彎曲機制與費米能級對電子傳輸的影響。
  21. OLED驅動IC市場沒落：分析Magnachip轉型電源半導體策略，質疑市場復甦可能性。
  22. 半導體週報重點：本週聚焦2奈米GAA技術、中國設備禁令、3D DRAM突破等產業動態。
  23. 中國SiCarrier挑戰ASML：討論中國光刻機技術進展，質疑媒體過度渲染突破可能性。
  24. 跨領域博士求職焦慮：材料科學轉半導體研究者憂心背景多元反成職涯阻礙。
  25. 柔性半導體職涯風險：探討特殊技術領域經驗是否限制轉入主流半導體公司的機會。

（註：第6篇因內文重複未提煉有效資訊，第20篇摘要為推測性整理）

目錄​

1. Rant: TSMC is just sweat shop.​

這篇文章的核心討論主題是作者對台積電（TSMC）工作文化的強烈不滿和批評，主要聚焦於以下幾點：

  1. 高壓工作環境：作者形容台積電的工作文化極度苛刻，員工被迫長時間工作，沒有週末或夜晚的休息時間，且需求總是急迫（「現在就要」或「昨天就該完成」）。
  2. 對工程師權益的擔憂：作者認為，若台積電壟斷市場並擊敗所有競爭對手，工程師將失去職場選擇權，導致公司可能壓低薪資，損害員工利益。
  3. 對「東亞血汗文化」的批判：作者將台積電比擬為西方國家眼中的「中國血汗工廠」，並指出這種惡性競爭的文化最終只會讓股東獲利，而非員工或整體產業。
  4. 個人情緒宣洩：文章帶有強烈的憤怒與無奈，反映作者在經歷漫長工作日後的疲憊與挫折感。

總結來說，核心議題是對台積電高壓管理與東亞職場文化的批判，並警示這種模式對員工和行業的潛在負面影響。

內容​

Got a really long day due to TSMC. Just a rant. It felt like TSMC to US fab is just like Chinese sweat shop to manufacturing in western countries. Jesus they work like there is no tomorrow. No weekend and no night, everything they want is either now or yesterday.

Fucking Christ don't they know if they beat all competitions, the engineers will be the next on chopping block? Like there will be no other companies to jump to. So TSMC can and will suppress the salary cost to the ti```!

This type of throat cut east asian culture make no winner, except the shareholders of TSMC.

Sorry just a rough day. Vent out.

討論​

評論 1:

Fab work in general is for the young. I'm glad I don't have to do it anymore.

Samsung was absolutely awful, I can't imagine TSMC being any better.

評論 2:

It's not just TSMC that's that demanding I work in an Intel (luckily not for them but for a vendor) fab and they are exactly the same.

評論 3:

Just curious , are you Taiwanese or American ? Cuz TSMC experience will mean a lot to them in coming years

評論 4:

Welcome to manufacturing!

評論 5:

Yeah man. It takes a certain kind of person to work in a fab for a long period. Im glad I did young when I entered the industry but super glad I dont work for the fab companies any more. I just go in there for time to time.

2. Though on interning/working at Samsung Semiconductor? \{#2-though-on-interning-working-at-samsung-semico}​

這段文字的核心討論主題是：

實習生對半導體行業工作環境的擔憂與資訊尋求

具體要點包括：

  1. 對負面評論的關注：作者注意到關於該公司（推測為半導體相關企業）的負面評價，但缺乏具體細節。
  2. 尋求更多資訊：希望透過其他管道（如Reddit等論壇）了解實際情況，以彌補資訊缺口。
  3. 個人動機：因即將進入該公司實習，想提前掌握行業動態與內部文化，以做好準備。

整體而言，內容反映實習生對職場真實情況的焦慮，以及主動尋求透明資訊的心態。

內容​

I saw a lot of negative commen about working here, but no specific details on other reddit pos. I will be interning here this summer, so I am curious and want to stay in the know with the semiconductor industry.

討論​

評論 1:

Interns don't work hard. You're not going to get a call on the weekend or after hours about coming in to work.

評論 2:

I assume in Austin? For an intern, there shouldn't be too many issues. You'll likely work 8-5 and be shielded from having to deal with late nigh``` and/or weekends unless there's another catastrophe like the Polar Vortex in 2021. About the only negative thing will be that you may want to make some significant change, but they'll tell you that you have to go through South Korea first. That will probably take longer than your internship. I would say, just work hard when you're on site, learn as much as you can and show them that you can bring value to the company. Good luck on your internship!

評論 3:

Which facility lol. The American ones used to be able to actually do nothing and still get job offers.

3. Taiwan chipmaker UMC launches US$5 billion wafer fab facility in Singapore; 700 jobs to be created​

根據您的提問，「Any word on the GlobalFoundries acquisition?」的核心討論主題是關於 GlobalFoundries（格羅方德半導體公司）可能被收購或相關交易進展的最新消息。

具體可能涉及以下方向：

  1. 收購傳聞或官方聲明：是否有企業（如英特爾、三星等）提出收購意向，或GlobalFoundries自身的回應。
  2. 交易進展與細節：談判狀態、金額、時間表，或監管審批等動態。
  3. 產業影響：若收購成真，對半導體行業（如晶圓代工市場競爭、供應鏈）的潛在影響。

若您需要更詳細的資訊（如特定時間點的新聞或傳聞來源），建議補充背景或進一步說明，以便提供更具體的答案。

內容​

Any word on the GlobalFoundries acquisition?

討論​

評論 1:

Any word on the GlobalFoundries acquisition?

4. Intel internships​

這篇文章的核心討論主題是：英特爾（Intel）的新任CEO是否可能撤銷實習生錄用通知（revoke internship offers），尤其是在俄亥俄州晶圓廠（Ohio fab）建設延遲、公司招聘需求可能減少的情況下。

作者認為，從公司利益角度來看，撤銷實習機會是一個合理的選擇，因為：

  1. 實習生是「無利潤的支出」：如果公司不打算大量招聘，培訓實習生只是純成本，且轉正率可能不高。
  2. 公司現狀不佳：英特爾的市場地位和財務表現可能影響實習生的留用機會。

討論的背景涉及英特爾的戰略調整（如晶圓廠延遲）對人力資源政策的潛在影響，尤其是對實習生這一非核心人力資源的取捨。

內容​

Do y'all think internship offers will get revoked?

I feel like if I was the new CEO, revoking internship offers would be a no brainer. With delay of Ohio fab, I can't imagine they'll be hiring all that much... and interns at Intel are a profitless expense if you aren't hiring cause it's just pure training (and even then, your conversion rate pry won't be great with the company's standing).

討論​

評論 1:

Unlikely. You need to keep building a talent pipeline and bringing entry level grads into your organisation, even when times are tough

評論 2:

If a company as large as Intel, with as many zeros as it does on i``` financial report, decides that cutting internships is the cost-saving move, that company is TRULY being run into the ground. For how little they cost, internship programs are high ROI (recruitment) and, as the other commenter said, builds a solid pipeline for more workers. Its honestly more human capital intensive than it is money intensive.

A summer program that cos``` six-/seven-figures is not a corner youre auditing when you are facing hundreds of million in loses and a collapse of your market valuation.

評論 3:

In the past, internships have been relatively safe. I'm not personally in a position to know anything definitive, but I would expect them to be safe based on past experience here.

評論 4:

At the keynote, he talked about retaining talent. I see that as a promising sign for most roles

評論 5:

Intel would do a mass layoff on Monday and hire new people on Tuesday. Companies as big as it is all ways needs new people coming in. If they are not hiring new people they are going out of business. They always need cheaper labor, which a new hire is .

Internships are about building talent pool. Also they want people who already know how they do things. If they are going to do anything they will increase internships in design areas as they bring in fresh ideas.

5. Internship at applied materials​

這篇短文的核心討論主題是：
「求職者分享軟體工程實習面試經驗，並詢問他人是否收到錄取結果」

具體包含以下重點：

  1. 個人經歷：作者提到上週參加了軟體工程實習的面試。
  2. 當前狀態：正在等待面試結果，表現出焦慮或不確定感。
  3. 尋求互動：詢問是否有其他人也在等待結果，暗示希望獲得同儕回饋或情緒支持。

整體而言，內容聚焦於「求職等待期」的心理狀態與社群互動需求。

內容​

I had interview last week for software engineer intern. Waiting for resul``` anyone ?

討論​

評論 1:

What did they asked in your interview?

6. Chip production: Russia builds i first own lithography systems \{#6-chip-production-russia-builds-i-first-own-lit}​

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內容​

You can buy stuff on ebay that is better than that. LOL Even China is stuck trying to squeeze 5nm chips out of DUV machines and they have had access to foreign technology up until recently. Russia has a long way to go without access to foreign technology like China had to try and catch up.

China, even with trillions in theft and billions in investment. Has yet to reach the EUV threshold. Russia has a long way to go. Is it as good as ASML ? Not great for modern standards but from what I checked it looks like theyre also trying to make an EUV litho like China. They made a solid state EUV source with 4% conversion efficiency at 11.2 nm, I think that paper also got an AIP rising star award iirc. Theyre still far behind though, especially with EUV mask making but the institute that made the EUV source have also made some paten``` for ASML before when relations were better. Yes, this is 1995 level tech. But per the article, Russia uses 40 nm for their missiles (2007) and can already make 90 nm stuff.

So yeah, they are not catching up to Taiwan/China/US any time soon. But theyre not trying to.

討論​

評論 1:

You can buy stuff on ebay that is better than that. LOL

評論 2:

Even China is stuck trying to squeeze 5nm chips out of DUV machines and they have had access to foreign technology up until recently. Russia has a long way to go without access to foreign technology like China had to try and catch up.

China, even with trillions in theft and billions in investment. Has yet to reach the EUV threshold. Russia has a long way to go.

評論 3:

Is it as good as ASML ?

評論 4:

Not great for modern standards but from what I checked it looks like theyre also trying to make an EUV litho like China. They made a solid state EUV source with 4% conversion efficiency at 11.2 nm, I think that paper also got an AIP rising star award iirc. Theyre still far behind though, especially with EUV mask making but the institute that made the EUV source have also made some paten``` for ASML before when relations were better.

評論 5:

Yes, this is 1995 level tech. But per the article, Russia uses 40 nm for their missiles (2007) and can already make 90 nm stuff.

So yeah, they are not catching up to Taiwan/China/US any time soon. But theyre not trying to.

7. How to move out of the industry?​

這篇文章的核心討論主題是：
一名半導體設備工程師對職業倦怠與轉職可能性的困惑，具體聚焦於以下幾點：

  1. 職業倦怠與工作壓力：
    作者雖獲得正面評價，但深感現職（晶圓廠設備維護）消耗心力，長期面臨「產線停機」與「安全問題」的壓力，形容工作如同「被束縛的工廠猴子」（fab monkey）。

  2. 轉職動機與方向：
    作者希望脫離現狀，尋求職涯多樣化（branch out），但對轉職選項缺乏明確方向，並擔憂離開半導體製造業（fabs）可能面臨大幅降薪（pay cut）。

  3. 專業技能與興趣的取捨：
    作者喜歡操作機器，但渴望更充實或多元的工作內容，暗示對技術深化或跨領域發展（如研發、管理、技術銷售等）的潛在興趣。

總結：文章本質是尋求「半導體設備工程師的職涯突破建議」，探討如何在專業技能、薪資報酬與職業滿足感之間取得平衡。

內容​

I've been an equipment engineer in the industry for a bit and I think I do a decent job (decent to good reviews, good opinions from coworkers), but holy hell can it be a soul sucking job. I like working on machines but I'd also like not feeling like I'm shackled to being a fab monkey for the rest of my career, always worried about down time or safety issues. What are my options to branch out, if you guys know any? I assume the pay cut can be pretty steep when moving out of fabs?

討論​

評論 1:

Equipment vendor side - e.g. equipment start-up engineer?

評論 2:

what do you mean by out of industry? out of semicon? or out of manufacturing?

if you want out of semicon, i``` relatively simple since semicon is the most stringent, any manufacturing will be glad to have you. i have seen colleagues transition to shipbuilding and light industry (manufacturing printers).

if you want out of manufacturing, you can leverage your knowledge on maintenance/leadership instead of machine knowledge and transition to civil engineering. Take care of facilities management like bridge, road, train station, etc. Settle for govt job.

評論 3:

Been going through the same thing.

People who don't work in fab ops really have no idea how brutal and miserable it can be. Same goes for any manufacturing in the US.

My solution was to hop to a better company. The raise, change of scenery, superior culture, and new challenges (new department) have been enough to reinvigorate my engagement with the job.

Yeah, it's a certainty that I'll burn out again, but this has allowed me a few more years of high income until I inevitably can't take it anymore and pull the ripcord.

Other paths are management, sales, vendor roles.

評論 4:

Field service can be fantastic if you find the right company.

評論 5:

You can do anything else in instrumentation work. Semiconductor is the pinnacle of high tech, while other areas like medical devices and some diagnostic equipment must consider cost per unit and cost of operation so they might use a lesser technology. While you are probably accustomed to working with precision positioning electronics in robotics, some devices will use older tech like bel``` and stepper motors with homing sensors, no linear encoders or optical positioning, no drop pin alignment. But you know these technologies so you'd be the leader of the pack so to speak with most other groups since some of your coworkers might be more into chemistry or basic engineering principles.

8. 2inch GaAs on Si wafer​

这篇文章的核心讨论主題可以總結為以下幾點：

  1. 物品的價值與用途不確定性
    討論者認為該半導體物品（GaAs on Si）作為商品或收藏品的價值有限，因為缺乏對其功能、電路設計、歷史背景或來源的瞭解，且可能僅適合作為裝飾品。

  2. 技術與真實性的質疑
    對物品的材質（是否真的為砷化鎵GaAs沉積在矽Si上）和狀態（是否已完成加工、是否有保護塗層）提出疑問，並指出需要進一步分析才能確認其真實性。

  3. 潛在的健康與安全風險
    重點強調砷化鎵（GaAs）的危險性，尤其是砷（As）成分的毒性。討論者警告，不當處理（如未在無靜電環境中包裝或未使用防護措施）可能導致有毒顆粒釋放，對人體（如吸入或誤食）造成危害，並建議謹慎處理或妥善廢棄。

  4. 專業與非專業環境的對比
    對比專業實驗室（如使用層流設備、特殊標籤）與普通桌面環境的差異，凸顯非專業人士隨意處理此類物品的風險。

整體而言，文章圍繞「不明半導體物品的價值模糊性、技術疑慮及潛在健康危害」展開，並呼籲謹慎應對。

內容​

If you wanted to sell it as a semiconductor, probably $5. Nobody knows what it does, what the circuitry looks like.

As a collectors item or museum artifact? No idea, but probably also low since we dont know the history or provenance of this item. I would like one for my desk. I doubt it would be useful for much other than a decoration at this point. How do you even know it's really GaAs on Si. You'd have to do analysis on it to prove that's really what it is.

FWIW depositing epi GaAs on Si is not easy. Sell them to a museum's gift shop for souvenirs, Id pay for shipping for one or two Man, without actually knowing the architecture, you can't do anything with these.

Do you even know if they are finished?

Are they coated with a protective layer.

Also, they are not packaged in a non-static bag. So they could already be ruined.

If I were you, I would dispose of those carefully seeing Ga i```elf is not very dangerous , some compound can be. And since you don't really know what type of Ga you are dealing with.. I can tell you that the As part is fucking dangerous!!

Arsenide is nothing to fuck around with!

I work with this bi-weekly and we have special stickers to denote that GaAs is involved so we know what toso when a wafer breaks.

And we work under laminar flow, you are just sitting at your desk.

Just handling these can already produce particles that you inhale or family members/pe``` can inhale or ingest.

Not smart.

討論​

評論 1:

If you wanted to sell it as a semiconductor, probably $5. Nobody knows what it does, what the circuitry looks like.

As a collectors item or museum artifact? No idea, but probably also low since we dont know the history or provenance of this item.

評論 2:

I would like one for my desk. I doubt it would be useful for much other than a decoration at this point.

評論 3:

How do you even know it's really GaAs on Si. You'd have to do analysis on it to prove that's really what it is.

FWIW depositing epi GaAs on Si is not easy.

評論 4:

Sell them to a museum's gift shop for souvenirs, Id pay for shipping for one or two

評論 5:

Man, without actually knowing the architecture, you can't do anything with these.

Do you even know if they are finished? Are they coated with a protective layer.

Also, they are not packaged in a non-static bag. So they could already be ruined.

If I were you, I would dispose of those carefully seeing Ga i```elf is not very dangerous , some compound can be. And since you don't really know what type of Ga you are dealing with.. I can tell you that the As part is fucking dangerous!!

Arsenide is nothing to fuck around with!

I work with this bi-weekly and we have special stickers to denote that GaAs is involved so we know what toso when a wafer breaks.

And we work under laminar flow, you are just sitting at your desk.

Just handling these can already produce particles that you inhale or family members/pe``` can inhale or ingest.

Not smart.

9. Internship offers??​

這篇文章的核心討論主題是：

「一位正在接受VLSI培訓的四年制BTech學生，詢問當前半導體產業是否有實習機會。」

具體要點包括：

  1. 學生背景：第四年工程學士（BTech），專注VLSI（超大型積體電路）領域培訓。
  2. 需求：探討當前半導體產業（如晶片設計、製造、EDA工具等相關企業）是否提供實習職缺。
  3. 潛在動機：可能希望累積產業經驗，為求職或深造做準備。

延伸議題可能涉及：

內容​

I'm a 4th year btech student ,undergoing vlsi training.At present do we have any internship opportunities in any semiconductor industry??

討論​

無討論內容

10. GlobalFoundries, Taiwanese chipmaker UMC consider merger, sources say​

根據路透社報導，核心討論主題是全球晶圓代工廠GlobalFoundries與台灣聯電（UMC）可能進行的合併談判，相關消息源自《日經新聞》的報導，並提及潛在交易可能在2025年達成。重點包括：

  1. 企業動向：兩家半導體代工巨頭正在評估合併可能性，以應對產業競爭與市場需求。
  2. 產業背景：在全球晶片供應鏈重組與地緣政治影響下，此舉可能強化雙方在成熟製程的市場地位。
  3. 時間框架：談判仍處早期階段，若成功可能於2025年完成。

此報導反映半導體產業持續整合的趨勢，以及企業在技術與規模競爭中的策略布局。

內容​

連結： https://www.reuters.com/markets/deals/globalfoundries-taiwanese-chipmaker-umc-mull-potential-merger-nikkei-reports-2025-03-31/

討論​

無討論內容

11. SiCarrier President full speech at SEMICON China​

根據提供的連結標題和描述，文章的核心討論主題應為：

SiCarrier公司總裁在SEMICON China展會上的演講內容分析與公司業務綜述
具體可能包含以下重點：

  1. SiCarrier公司介紹：業務範圍、技術方向或市場定位的全面解析。
  2. 總裁演講摘要：翻譯後的關鍵內容，可能涉及半導體行業趨勢、公司戰略或中國市場佈局。
  3. SEMICON China背景：展會中釋放的行業信號或SiCarrier的參與意義。

由於無法直接訪問原文，以上推論基於標題中的關鍵詞（如「SiCarrier」「President speech」「SEMICON China」）及常見半導體行業會議的討論範疇。若需更精確總結，建議提供演講具體內容或段落。

內容​

連結： [https://www.nomadsemi.com/p/what-sicarriers-president-said-at

Full breakdown of SiCarrier and a translated copy of their President speech at SEMICON China](https://www.nomadsemi.com/p/what-sicarriers-president-said-at

Full breakdown of SiCarrier and a translated copy of their President speech at SEMICON China)

討論​

無討論內容

12. Daily: US-China tech war spirals; Trump cu BIS funding; Interview w Gelsinger \{#12-daily-us-china-tech-war-spirals;-trump-cu-bi}​

根據 Chip Briefing 的文章《Daily: US-China Tech War Spirals; Trump...》，核心討論主題聚焦於以下幾點：

  1. 美中科技戰升級：
    文章深入分析近期美國與中國在科技領域（尤其是半導體、AI、量子計算等關鍵技術）的競爭加劇，包括美國對華技術出口管制、投資限制等措施的擴大，以及中國的反制措施。

  2. 特朗普可能回歸的影響：
    討論若特朗普在2024年美國大選中勝出，其政府可能採取更激進的對華科技政策（如進一步收緊制裁、加大脫鉤力度），以及這對全球供應鏈和科技產業的潛在衝擊。

  3. 全球供應鏈與產業鏈重組：
    強調美中科技對抗如何加速全球技術與製造業的分裂（例如「友岸外包」趨勢），以及企業面臨的挑戰與應對策略。

  4. 中國的自主創新與突圍：
    分析中國在技術自主化（如國產晶片替代）方面的進展，以及美國施壓下的長期戰略調整。

總結：文章以「美中科技戰螺旋式升級」為主軸，結合政治（特朗普因素）、經濟（供應鏈重構）與技術（中國自主化）的多維度影響，探討這一衝突的現狀與未來走向。

內容​

連結： https://chipbriefing.substack.com/p/daily-us-china-tech-war-spirals-trump

討論​

無討論內容

13. Will TSMC be only with "2nm" class process node?​

这篇文章的核心討論主題是探討在三星取消其「2奈米」級製程節點、英特爾取消20A和A18製程且相關進展不明的情況下，台積電（TSMC）是否會成為「2奈米」及更先進製程（如2奈米以下）的唯一製造商。

重點包括：

  1. 競爭格局的變化：三星和英特爾在先進製程（如2奈米）的退出或延遲，可能使台積電成為該領域的唯一供應商。
  2. 技術壟斷的潛在風險：若台積電獨占先進製程市場，可能對全球半導體供應鏈（如晶片供應、定價、技術創新）產生深遠影響。
  3. 產業動態的不確定性：英特爾的A18製程進展不明，加上缺乏其他競爭者的明確消息，強化了台積電的主導地位。

總結：文章聚焦於「2奈米及更先進製程是否將由台積電獨家供應」，並分析此情境對半導體產業的潛在影響。

內容​

Will TSMC be only with "2nm" class process node? After Samsung cancel it and Intel cancel 20A and A18 is still out of sight and there is no news about it will there left only one manufacter of "2nm" and sub 2nm process?

討論​

評論 1:

Samsung according to web articles is targeting 2nd half of 2025 for full scale production at 2nm. https://wccftech.com/samsung-could-beat-```mc-in-the-2nm-race/

Assuming they can find customers that will choose them over TSMC.

評論 2:

So 2nm is just a label for the process of the manufacturing. It has nothing to do with any size on the transistor.

Here is my clearest example of what this means. For TSMC their first finFET transistor process technology was labeled as 16nm. Before that their 20nm process was still using planar transistors.

As a juxtaposition, for Intel their first finFEt transistor was marketed/labeled as 22nm and the prior node was a 32nm node made with planar transistors.

So now we are at TSMC N2 (mc labels it as an N2 node and Intel labels as 18A) and Intel 18A. Both TSMC N2 and Intel 18A will feature gate all around transistors. Intel labels them as RibbonFET and TSMC calls them nanosheet transistors. TSMC N2 will be the first time we see nanosheet transistors and Intel 18A will be i second time that they've introduced RibbonFET and PowerVIA (backside power delivery) into a single process node.

The first for Intel was their 20A node which featured both RibbonFET transistors and PowerVIA. However that node was not ready for full production and so they've shifted entirely to 18A and 18A needs to demonstrate full production readiness. We will know by the end of this year which will come quickly.

Intel themselves projected earnings and revenue parity by 1st half of 2026 which would mean that they predict that earnings from 18A will satisfy their CAPEX or capital expenditures. Basically they will no longer be in the negative and be able to pay for their own fabs again.

評論 3:

Are you saying Intel 18A isnt a 2nm process? Or are you saying chips wont actually be manufactured on 18A?

評論 4:

Only the three you mention will have the process capability to achieve 2nm and beyond. Intel will shift their focus on larger sizes and get manufacturing back to where it needs to be before investing millions in R&D to get to beyond 2nm (although ASML and Intel are very closely linked and some of the ASML development is done with Intel, but still doubt it will go into production soon). Only real rival will be Samsung, and if they are taking a step back, don't see anyone else going after it... Samsung will get there, but TSMC does appear to be miles ahead in terms of manufacturability at small scale.

評論 5:

Rapidus in Japan is aiming to be the main competitor to ```m for 2nm.

14. Applied Materials Project Manager Interview​

這篇文章的核心討論主題是：
尋求關於應用材料公司（Applied Materials）專案經理職位面試的建議與經驗分享。

具體重點包括：

  1. 面試準備：提問者即將面試應用材料公司的i製造業務部門（可能指半導體或顯示器相關領域）的專案經理職位，希望獲得相關面試技巧。
  2. 經驗交流：徵求有過該公司面試流程的人分享實際經驗（如面試結構、常見問題、考核重點等）。

隱含需求可能是了解該職位的技術或管理能力要求，以及公司文化契合度等細節。

內容​

I have an interview soon with Applied Materials for a project manager role in i``` manufacturing business unit. I would appreciate any tips from anyone who has gone through Applied Materials interview process.

Thank you.

討論​

無討論內容

15. Struggling to Land My First Job in the Semiconductor Industry Need Advice & Resume Review​

這篇文章的核心討論主題是：

「一位半導體設備領域的博士後研究者求職困難，尋求職涯建議與履歷優化的幫助」

具體內容包括：

  1. 求職困境：作者擁有半導體器件博士學位，並完成博士後研究，但四個月來未能找到業界工作。
  2. 求助方向：
    • 請求針對半導體產業的求職策略建議（如管道、技能強化、人脈拓展等）。
    • 希望他人檢視其履歷（附上圖片連結），以找出可能改進之處。

討論重點圍繞在「如何從學術過渡到產業界」以及「履歷如何吸引企業青睞」，屬於職涯發展與求職技巧的範疇。

內容​

I am trying to get my first job in the semiconductor industry. I did my PhD in Semiconductor Devices, and it has been four months since my postdoc, but I haven't been able to find another job. Could you give me some suggestions? Also, could you check my resume? Thank you.

https://preview.redd.it/nmyt581333se1.png?width=533&format=png&auto=webp&s=d443746c45dec5470cffa4974abfdd7a315aceca

https://preview.redd.it/58nps71333se1.png?width=508&format=png&auto=webp&s=41e88b3da1cbcde3c2118f756b1d68852ac46de4

討論​

評論 1:

Look into the toolmakers: KLA, LAM, Applied Materials

評論 2:

OP, what companies have you tried?

評論 3:

I can also recommend looking into "Applications Engineer" roles at ASML for example.

評論 4:

Reduce to one page. Combine experience and key projec, this should be the second section: particulars including work righ, experience including specific achievemen``` in each role, education, 'other things' like certifications last.

Understand that the jobs market for graduates right now is awful. Almost everyone is in a hiring freeze except for experienced hires. Just keep trying.

For people in their degrees checking this thread: this is one of the reasons you should enter industry as soon as possible, and I say that as someone who went the PhD route instead. In hard times, companies are more likely to hire a person with experience than a person with extra education.

16. Is VLSI engineering work monotonous?​

這篇文章的核心討論主題是：VLSI（超大型積體電路）工程師的工作是否單調重複，以及其工作中創造性與重複性任務的比例。具體重點如下：

  1. 作者背景與動機：

    • 目前從事IT行業，喜歡解決問題，不喜歡單調的工作。
    • 考慮轉向VLSI工程領域，但擔心工作是否過於重複或缺乏挑戰性。

  2. 核心問題：

    • VLSI工程師的日常工作是否單調（monotonous/repetitive）？
    • 該領域中「創造性」與「重複性」任務的占比（例如以百分比形式量化）。

  3. 需求：

    • 希望了解VLSI工程師的實際工作內容，以評估是否符合個人職業偏好（追求問題解決與多樣性）。

總結來說，這是一個關於職業選擇與工作性質分析的探討，聚焦於VLSI工程領域的任務多樣性與創造性空間。

內容​

Is VLSI engineering work monotonous? Currently, I am working in IT. I like to solve problems, I don't like monotonous work. Does VLSI engineer work too monotonous/repetitive, Can you tell me how much percentage is monotonous and creative?

討論​

評論 1:

Define whats monotonous for you?

評論 2:

If you plan to jump from IT to VLSI, you should have a BSEE at the very least, and know someone.

Most of that work is considerd IC digital design, and needs a masters+ from highly rated schools.

You are looking at very elite work.

The work is like recess all day.

You might be able to first go to board design and get some FPGA work or work hardening FPGA to ICs. But I have been out for a long while now, so the design flow may be different now.

Even that work is going to be very competitive.

17. Semiconductors​

以下為台灣與新加坡大學電機工程學士學位的核心比較主題總結：

  1. 學術排名與國際聲譽

    • 新加坡大學（如NUS、NTU）在QS等國際排名通常高於台灣頂尖大學（如台大、清大），反映研究資源與全球影響力差異。

  2. 課程結構與專業方向

    • 台灣：強調傳統電機領域（電力系統、控制工程），課程較理論導向。
    • 新加坡：融入跨學科應用（如AI、資通訊科技），注重實務與產業連結。

  3. 教學語言與國際化

    • 新加坡以英語授課，吸引更多國際學生；台灣部分課程可能以中文進行，但國際學程逐漸增加。

  4. 學費與獎學金

    • 台灣學費較低（年均約3,000-5,000美元），新加坡較高（年均1.5萬-3萬美元），但新加坡提供豐厚獎學金機會。

  5. 產業連結與就業前景

    • 新加坡鄰近科技樞紐（如半導體、金融科技），實習機會多；台灣強在半導體製造，本地就業機會穩定。

  6. 研究資源與設備

    • 新加坡政府投資充足，實驗室設備新穎；台灣頂大亦有先進設施，但整體資源可能較分散。

  7. 文化與生活適應

    • 台灣生活成本低、文化親和力高；新加坡國際化程度高，但生活壓力較大。

結論：選擇取決於優先考量—新加坡適合追求國際職涯與資源的學生，台灣則以性價比與在地產業優勢見長。

內容​

compare Taiwan university and Singapore university with electrical engineering major (bachelor's degree)

討論​

無討論內容

18. ECE Masters of Science student with a focus on on Analog IC Design/Mixed-Signal Design trying decide final class to take before graduation asking for advice as to what to take since there are four classes that I am trying to decide between.​

這段文字的核心討論主題是：
一位即將取得電子與計算機工程（ECE）碩士學位的學生，如何選擇最有利的課程來提升進入「混合信號/類比IC設計」職涯的競爭力。

具體重點如下：

  1. 求職目標與背景：

    • 作者熱衷於類比IC設計（Analog IC Design），但也對數位信號處理（DSP）和數位設計（Digital Design）有興趣。
    • 目前無工程相關工作經驗，急需累積專業能力以進入產業。

  2. 課程選擇的考量：

    • 從四門課中評估哪一門對「混合信號/類比IC設計」職涯最有價值，包括：
      • 硬體安全與信任（Hardware Security）
      • 半導體製程實驗（Semiconductor Fabrication Lab）
      • 計算機架構（Computer Architecture）
      • 可重構計算（FPGA/VLSI）
    • 作者認為FPGA/VLSI課程雖非直接相關，但可能有助於應對數位IC設計需求，並作為求職備案。

  3. 潛在矛盾與取捨：

    • 在「直接相關的類比IC技能」與「擴展數位IC/FPGA的備用技能」之間權衡。
    • 半導體製程實驗可能貼近類比IC實務，但其他課程（如硬體安全）的應用價值尚不明確。

總結：
文章主要探討「如何透過課程選擇最大化類比IC設計職涯機會」，並反映作者在專業深化與求職現實之間的策略思考。

內容​

By the way I did enjoy the DSP class a lot and I also like Digital Design, but I am hoping to get a job in Analog IC Design (a subject I greatly enjoy and I have found a passion in--I also absolutely love DSP stuff too). After this current semester, I will only need one class to graduate with my Masters in ECE. BTW, I am not employed in engineering at this time, so I am really trying to break in and get a chance at starting a career.

How would you rank these in terms of value for a person trying to find their way into a position as an Mixed-signal/analog IC designer?

The four classes that I am trying to decide between are

EEE5716 - Introduction to Hardware Security and Trust

Description: Fundamentals of hardware security and trust for integrated circui. Cryptographic hardware, invasive and non-invasive attacks, side-channel attacks, physically unclonable functions (PUFs), true random number generation (TRNG), watermarking of Intellectual Property (IP) blocks, FPGA security, counterfeit detection, hardware Trojan detection and prevention in IP cores and integrated circui.

EEE5354L - Semiconductor Device Fabrication Laboratory

This course will be offering hands-on experience in semiconductor material characterization and device fabrication techniques.

EEL5764 - Computer Architecture

Fundamentals in design and quantitative analysis of modern computer architecture and systems, including instruction set architecture, basic and advanced pipelining, superscalar and VLIW instruction-level parallelism, memory hierarchy, storage, and interconnec```.

EEL5721 - Reconfigurable Computing

Fundamental concep at introductory graduate level in reconfigurable computing based upon advanced technologies in field-programmable logic devices. Topics include general concep, device architectures, design tools, metrics and kernels, system architectures, and application case studies.

I know the FPGA/VLSI (Reconfigurable Computing) course is far away from Analog IC Design, but I figure getting better with and doing projec with VLSI (although I did that a bit as an undergrad) would be valuable when I encounter digital IC projec in this field, plus knowing FPGAs better may prove to be a good security in case I find it hard to find Analog IC jobs (which would be a bummer for me).

Thank you for the advice!

討論​

評論 1:

If you want to do design, do the fab course.

19. The CHIPS Act already pu America first. Scrapping it would poison the well for US investment \{#19-the-chips-act-already-pu-america-first-scrap}​

The core discussion theme of the provided text revolves around economic nationalism and the "America First" policy, particularly focusing on:

  1. Strengthening Domestic Industries – Advocating for policies that prioritize American companies and bring manufacturing jobs back to the U.S.
  2. Criticism of Past Legislation – Disapproval of previous bills (implied to lack sufficient "America First" measures) and a call for stricter, more protectionist policies under future legislation.
  3. Support for Local Investment – Emphasis on funding American-based businesses (e.g., Wolfspeed) to bolster domestic capabilities.
  4. Political Frustration – Contempt toward perceived failures in past administrations (including Trump’s) to enforce truly nationalist economic policies.

The tone is passionate and critical, blending economic patriotism with dissatisfaction over perceived shortcomings in U.S. trade or industrial policy.

內容​

It was gutted out of contempt. Childish You sweet summer child you think America first is what gutting its about? My hope is that it stays and that if Trump really wan``` it to be more America first then make a new bill with even more funding that can only go to American based companies. Yes we must build our in country capabilities. Buy $Wolf support wolfspeed. Build local , bring jobs back to USA. Yeah but it wasn't passed under Trump.

討論​

評論 1:

It was gutted out of contempt. Childish

評論 2:

You sweet summer child you think America first is what gutting its about?

評論 3:

My hope is that it stays and that if Trump really wan``` it to be more America first then make a new bill with even more funding that can only go to American based companies.

評論 4:

Yes we must build our in country capabilities. Buy $Wolf support wolfspeed. Build local , bring jobs back to USA.

評論 5:

Yeah but it wasn't passed under Trump.

20. Doubt in metal-semiconductor Junction​

这篇文章的核心讨论主题是 金属与n型半导体接面（junction）的能带特性与电子行为，具体聚焦于以下两个问题：

  1. 能量-距离曲线（Energy vs. distance）的弯曲形状如何决定？
    这涉及金属-半导体接面处的能带弯曲机制，可能与肖特基势垒（Schottky barrier）的形成、空间电荷区的电场分布，以及费米能级对齐（Fermi level alignment）有关。

  2. 当半导体的费米能级高于金属时，为何电子更容易从半导体移出？
    这一现象看似违反直觉（因通常金属的电子更易逸出），但实际反映了接触电势差（contact potential）和能带弯曲对电子转移方向的影响，可能与半导体掺杂浓度或界面态（interface states）的作用相关。

深层议题：讨论者对金属-半导体接面的热平衡条件、费米能级钉扎（Fermi level pinching），以及载流子传输的物理机制存在困惑。

內容​

I was studying the junctions of metal and n type semiconductor.few thing are not clear to me

  1. how do they determine the shape bending in that Energy vs distance curve ?

  2. in the one of the case the fermi level of the semiconductor is higher than that of metal.Does not it mean it is easier to take out electrons from the semiconductor than from the metal? It feels a bit unusual to me .

討論​

評論 1:

The shape of the band bending (or potential ) comes out to be parabolic when you solve the Poisson equation. The fermi-level being higher in semiconductor means the carriers in semiconductor have on average higher energy than the metal so they can easily get transferred to the metal side leaving behind space charge in the semiconductor

21. What happened to the OLED DDIC market and how viable is the power discrete / PMIC space?​

这篇文章的核心討論主題可以總結為以下兩點：

  1. Magnachip的業務轉型與市場挑戰

    • 作者探討了Magnachip從OLED顯示驅動IC（DDIC）業務（近年大幅衰退）轉向電源半導體業務（Power Discretes與PMIC）的策略，並分析其背後原因。
    • 重點問題包括：OLED DDIC市場為何崩潰且未復甦（可能因產能分配、客戶流失、低利潤結構），以及電源半導體領域是否真如Magnachip所述具有高成長潛力。

  2. 電源半導體市場的競爭與前景

    • 討論電源離散元件（MOSFET/IGBT）和電源管理IC（PMIC）的未來3-5年吸引力，包括市場增長空間、技術差異化可能性，以及中型企業（如Magnachip）在該領域的長期生存能力。
    • 作者質疑Magnachip對該領域的樂觀展望是否合理，並尋求業內人士對競爭動態與技術門檻的見解。

補充脈絡：文章反映半導體產業中，中小型廠商在技術節點分配、客戶集中風險（如三星內化供應鏈）及市場轉型策略上的挑戰，同時涉及類比/功率半導體與數位邏輯晶片的商業模式差異。

內容​

I'm pretty much a newbie in the semiconductor sector and recently came across Magnachip. Some things stood out, and I'd appreciate any insigh``` from people more experienced in this space. If a different sub is more suitable for these questions, please me know.

Context:

  1. Magnachip's OLED DDIC business has absolutely collapsed and it's looking to get out of it (this has gone from close to 60% of i``` business in 2020 to 15% in 2024)

  2. They're shifting their focus entirely to their Power Business, which includses

    1. Power Discretes - MOSFETs and IGBTs produced in their own fab in Korea

    2. Power ICs / PMICs - used in OLED TVs, data center SSDs, and ESS. This is fabless. This business has also been declining in the last couple of years but they see a much bigger market, much higher growth rates, as well as much better margins (30% gross margins).

My questions are:

1) What exactly happened to OLED DDIC market, and why isn't it bouncing back?

My understanding / guess is that this business needs 28nm wafers and during Covid all the supply went to higher-value use cases so guys like Magnachip got no allocation. This meant they lost customers who either went to bigger players that could get allocation or brought it in-house (e.g., Samsung). Afterwards there was no need for these customers to go back to Magnachip. Is this market so commoditized and low-margin now that it's structurally unattractive going forward?

2) How attractive is the Power Discretes / PMIC space in the next 3-5 years? Magnachip pain``` a very rosy picture but is this really a high-growth space? I know analog/power design doesn't follow the same bleeding-edge node dynamics as digital, but is there real differentiation here? Are mid-sized players like Magnachip viable in this space over the medium to long term?

Any commen``` appreciated and feel free to DM.

討論​

評論 1:

I can't give you a great view into the PMIC space, but OLED DDIC I have some perspective on.

Magnachip was always a second supplier to Samsung SEC, which is dominated by SLSI. They never got into any of the premium (higher margin) produc (especially mobile). Even LG captive SiWorks did better breaking into China/Japan OLED. Now that Novatek and Himax are in to field too (along with some smaller Chinese suppliers) they have no chance ouide Korea and Samsung is narrowing their suppliers over the last few years. Frankly, it appeared from the ou```ide that Magnachip was unable to deliver DDI without support from SEC (who used them for internal pricing leverage).

Early on the OLED DDIC were all 40nm, because (ou```ide SLSI which had 28nm) that was where everyone else was stuck with the top/bottom poly decision they made, which limited HV to <6V when it turned out 8V data line DACs were needed for OLED. Now there are fully developed 28nm HV with PDKs at all the majors (TSMC, UMC, SMIC?) in addition to SLSI so they really have no advantage. Geopolitics isn't on their side either.

All I know about PMICs is high power SiC in China so probably not relevant.

22. Chip Industry Week In Review: 2nm GAA deal; high-density 3D DRAM; China blacklist expands; global fab equipment; interposers and substrates; managing chiplet resources and more​

根據 SemiEngineering 的文章《Chip Industry Week In Review》的內容（假設其符合該網站的典型主題），核心討論主題通常圍繞以下幾個半導體產業的關鍵領域：

  1. 半導體技術進展

    • 先進製程節點（如 3nm、2nm）的研發與量產挑戰。
    • 新興技術（如 GAAFET、CFET 電晶體）的應用與瓶頸。

  2. 產能與供應鏈動態

    • 全球晶圓廠擴產計畫與產能分配。
    • 地緣政治（如美國 CHIPS 法案、歐洲補貼）對供應鏈的影響。

  3. 市場趨勢與需求

    • AI/高效能運算（HPC）、汽車電子、IoT 等應用驅動的晶片需求。
    • 記憶體市場（如 DRAM、NAND）的價格波動與技術轉型。

  4. 封裝與異質整合

    • 先進封裝技術（如 Chiplet、3D-IC）的發展與生態系合作。

  5. 行業重大事件

    • 企業併購、財報亮點或戰略調整。
    • 技術標準與產業聯盟的動態（如 UCIe 介面標準）。

若需更精確的總結，建議直接參考該文章提及的具體事件或數據（如某公司公告、技術突破等），但以上是 SemiEngineering 週報常見的討論框架。

內容​

連結： https://semiengineering.com/chip-industry-week-in-review-79/

討論​

無討論內容

23. China's SiCarrier emerges as challenger to ASML, other chip tool titans​

這段討論的核心主題圍繞以下幾點：

  1. ASML的技術優勢（護城河）：
    強調ASML在半導體設備（尤其是EUV光刻機）領域的領先地位，認為其競爭對手（如LAM Research、應用材料AMAT）的技術門檻相對較低。

  2. 中國在半導體技術的進展：
    提及中國預期將開發自主的EUV光刻技術，並對相關消息的出現表示不意外，反映業界對中國突破技術封鎖的長期關注。

  3. 媒體報導的嚴謹性質疑：
    批評媒體在討論技術瓶頸（如「量產良率」）前不應散播恐慌（FUD），需基於實際數據分析，暗示當前報導可能缺乏足夠證據。

  4. 未來技術發展的觀察：
    對短期內中國EUV技術的進展持開放態度，呼籲持續關注後續動向。

總結：討論聚焦於ASML的技術壟斷性、中國半導體自主化的潛力，以及媒體對技術挑戰的片面解讀，核心在於「高端半導體設備的競爭格局與技術門檻」。

內容​

The ASML moat is pretty big, LAM, AMAT, not so much. Journo's need to mention yield at scale before any FUD should be taken seriously Interesting! Lets see in a short future what is going on. It was expected that China would have i``` own EUV-based machines. Not very surprised. Actually I was wondering when we would see this kind of news

討論​

評論 1:

The ASML moat is pretty big, LAM, AMAT, not so much.

評論 2:

Journo's need to mention yield at scale before any FUD should be taken seriously

評論 3:

Interesting! Lets see in a short future what is going on. It was expected that China would have i``` own EUV-based machines. Not very surprised. Actually I was wondering when we would see this kind of news

24. Does having a varied background before a PhD make me a weaker candidate for future positions?​

這篇文章的核心討論主題是：作者對於自己學術背景多樣性（從材料科學轉向半導體器件測試與建模）可能影響未來職涯發展的擔憂。具體焦點包括：

  1. CV連貫性的焦慮

    • 過往研究集中於材料科學（薄膜沉積與結構表徵），但博士課題將轉向完全不同的半導體器件測試與建模，擔心學術軌跡顯得「跳躍」且不一致。

  2. 轉換領域的現實壓力

    • 因簽證限制被迫接受與學士論文相似的碩士課題，但內心真正想轉向器件領域，導致背景與博士方向出現斷層。

  3. 對未來競爭力的疑慮

    • 擔憂五年材料科學經驗在博士後求職時是否失效，相較於「直線型」競爭者（碩博研究連貫）是否處於劣勢。

  4. 決策矛盾

    • 儘管喜歡博士組別與導師，仍因背景差異產生自我懷疑，甚至考慮放棄入學。

總結而言，作者的核心問題在於：跨領域的學術背景是否會成為劣勢，以及如何評估這種多樣性對長期研究職涯的影響。

內容​

Hi guys,

I will be starting a PhD next year. What I'm struggling with is that I feel like my CV is too incoherent. I have good grades and have done research internships at okay/good labs, but I feel like I jumped too much between topics. My PhD will be completely different from my master's thesis.

They were almost all in the semiconductors field, but all my previous research was in the materials science side, with a strong focus on thin films deposition and characterisation, and what I'm doing for my thesis is even more fabrication and characterisation. However, my PhD will be more about semiconductor device testing and modellingcompletely different from the structural characterisation I'm used to.

The story is a bit odd, but I actually wanted to move toward this area. However, I secured the PhD while I was still actively looking for a master's thesis topic. At some point, as an international student, I had to take what was available due to visa constrain```, and that ended up being another materials science projectjust like my bachelor's thesis.

Now, my concern is whether this makes my profile too inconsistent. I already have five years of experience in materials science, and now I'll be shifting to semiconductor device testing for my PhD. In my PhD interview, they even mentioned that my background seemed broad (just looking at my bachelor thesis and master courses).

I'm starting to second-guess my PhD choice, wondering if I should drop out before even starting. But I really like the group, and my supervisor has great reviews from his studen (which I know is important, given all the horror stories about bad supervisors when talking to PhD studen).

Will my pre-PhD background be useless when applying for research positions later? Does this kind of varied path make me a weaker candidate compared to those with a more linear trajectory from master's thesis to PhD?

I'd love to hear your though``` and experiences. Thanks!

討論​

評論 1:

No one is going to care about the projec``` you did before your PhD unless you care about it.

Honestly, even the specifics of your PhD don't much matter unless you're trying to get into a very specific field of process or tool research. For example, doing an optics project will really help for a lithography optics position.

My PhD was in PVD of magnetic metals. I did work in PVD for a while, but now all my Metals support work is in thermal ALD. I haven't worked on a real PVD tool in five years.

評論 2:

In the short term? Not a problem, as others commented, the company doesn't care much and they will teach you all you need to know from scratch. In the long term? This will be your asset to have a more diverse experience.

評論 3:

Once you enter a company, you will need to learn everything from start. So I dont think its a big problem.

評論 4:

Dude, what you have done and going to do in your PhD are all relevant for the semiconductor industry. If youre a fresh college grad, you will be lapped up by the foundries as cheap labor. Ive seen my company hire a ton of psych majors who dont even know what silicon is, as equipment and process techs, and theyve gone on to become middle management. As a young grad entering the field you have good prospec```. Youre worrying too much.

評論 5:

I did organic synthesis in undergrad and do pure semiconductor physics for my PhD

25. How is pragmatic semiconductor?​

這段討論的核心主題是關於「柔性半導體技術的市場定位與職業發展影響」，具體可分為兩點：

  1. 技術的市場利基性
    探討柔性半導體技術是否屬於小眾領域（niche），尤其針對穿戴式設備的應用場景，並隱含對其未來發展潛力或應用範圍的疑問。

  2. 專業經驗的行業價值
    關注在該領域累積的經驗，是否可能限制職業選擇彈性，例如：此類專業技能對其他大型科技公司（如傳統半導體巨頭）的吸引力是否較低，涉及個人職涯發展的跨領域適應性問題。

整體而言，內容聚焦於「特殊技術領域的職涯風險與機會評估」。

內容​

Ive researched a little and found that they are doing flexible semiconductors. Its probably for wearable devices.

How niche is their technology? Will the experience there make me less attractive to other big players?

討論​

評論 1:

Flexible electronics has been coming for the last 15 to 20 years . a lot of great work but not yet in a mainstream. However, moving forward in the hypecycle curve. Some mobile device players have recently introduced foldable mobile devices. Lets see how they perform.

評論 2:

i only know about flexible solar cells. i think i``` probably quite niche because why would you do the extra work to make something flexible in a car, smartphone, pc etc.?

評論 3:

Pragmatic is aimed at low cost electronics - NFC/RFID on mass market goods. Technology is niche, but the manufacturing process uses the same tools and process steps as conventional silicon process.

評論 4:

If it's something really simple, sure. If you want memory and logic, then you will still need solid silicon in a rigid package. But that can be a very small package on a flexible printed circuit assembly.

總體討論重點

以下是25篇討論重點的條列式總結，並附上對應文章錨點連結：

1. 台積電工作文化批判​

  • 高壓環境：長時間工作、急迫需求，缺乏休息。
  • 工程師權益：壟斷市場恐壓低薪資，限制職場選擇。
  • 血汗文化：比擬中國血汗工廠，股東獲利優先於員工福祉。

2. 三星半導體實習資訊尋求​

  • 負評關注：對公司負面評價的擔憂，但缺乏細節。
  • 主動調查：透過Reddit等平台補充資訊缺口。
  • 動機：為實習預作準備，了解行業真實情況。

3. GlobalFoundries收購動態​

  • 交易進展：收購傳聞、談判狀態與監管審批。
  • 產業影響：對晶圓代工市場競爭與供應鏈的潛在衝擊。

4. 英特爾實習生錄取風險​

  • 撤銷可能性：因晶圓廠延遲，實習生可能被視為成本負擔。
  • 公司困境：財務表現不佳影響人力資源政策。

5. 應用材料實習面試經驗​

  • 求職焦慮：等待軟體工程實習結果，尋求同儕支持。
  • 互動需求：分享面試經歷並詢問他人進度。

6. 俄羅斯光刻機技術發展​

  • 技術自主化：俄羅斯嘗試開發本土光刻系統。
  • 地緣政治：制裁下的技術突破挑戰。

7. 半導體工程師轉職困境​

  • 職業倦怠：設備維護工作高壓且單調（"fab monkey"）。
  • 轉職障礙：薪資落差與技能轉換的不確定性。

8. GaAs晶圓的潛在風險​

  • 價值模糊：不明確的技術用途與收藏價值。
  • 安全疑慮：砷化鎵毒性與不當處理的健康危害。

9. VLSI學生實習機會​

  • 背景需求：BTech學生尋求半導體產業實習。
  • 市場趨勢：探討印度、台灣等地實習職缺現況。

10. GlobalFoundries與聯電合併傳聞​

  • 產業整合：兩公司談判合併以強化成熟製程競爭力。
  • 時間框架：預計2025年完成，反映供應鏈重組趨勢。

11. SiCarrier總裁演講分析​

  • 業務定位：中國半導體設備商技術方向與市場策略。
  • 行業信號：SEMICON China展會中的自主化進展。

12. 美中科技戰升級​

  • 政策對抗：技術出口管制與供應鏈脫鉤加劇。
  • 特朗普因素：潛在更激進的對華科技限制。

13. 台積電2奈米製程壟斷​

  • 競爭空缺：三星、英特爾退出先進製程研發。
  • 產業風險：單一供應商對定價與創新的影響。

14. 應用材料專案經理面試​

  • 經驗徵求：面試結構、考核重點與公司文化契合度。
  • 職能需求：技術與管理能力的平衡。

15. [博士後求職困境](#15-strugg​